Key Technologies

The following technologies are currently under development:

Neo-Stack

  • Accommodates a variety of dice in the same stack (4-50 layers) and multiple dice per layer

  • Bare stack footprint is the same as largest die, plus 25 mils on all sides

  • Easily accommodates die shrinks


Bendable Circuits

  • Off-shoot of thinning process for Neo- Stacks

  • Thickness: < 50 microns

  • Bendable, twistable interconnection between flexible circuits and flexible substrates

  • Core technology for wearable bio-monitor and conformal electronics


3DANN

  • 3D Artificial Neural Network (aka "Silicon Neuron")

  • High speed, compact image processing and human-level recognition capabilities

  • Core technology for VIP/Balboa Image Processing Board, the Silicon Brain initiative, and the SuperRouter development.


High Density Interconnects / Photonics Communication

  • Optical interconnects and switching are believed to be the key enabling technologies to achieve Terabit per second processing speed in a volume of a few cubic inches

  • Irvine Sensors is a Member, University of California at San Diego (UCSD)-led consortium developing a massively parallel, optically switched processor core for computers - a marriage of the electronic densities available with Irvine Sensors' proprietary chip-stacking processes and the speeds which can be realized by optically switching parallel interconnections between such dense structures - expected to permit a breakthrough in processing speed for classes of applications that are presently limited by computer bus architectures. Potential to be a powerful adjunct to 3DANN

  • Core technology for:
    - Silicon Brain
    - High speed Data Communications and Telecom Switches
    - A wide range of applications including servers, portable computer systems, cable TV, and fiber optics-to-the- home

High Density Interconnects/Photonics communication


SuperRouter

  • Serial data rates to 160 GHz

  • Ultra low reconfiguration latency for ATMs

  • Super computing via the Internet

  • Unique ISC and TRW technologies

  • Product potential as an Internet2 enabler

Super Router


Silicon Brain

  • Unifying principle is to emulate the human central nervous system

  • 3D Field-Effect Transistor (3D-FET) interconnect technology is a key enabling development

  • Expected to eventually attain Petaflop performance, i.e., quadrillions of operations per second

  • Anticipated to achieve the same volumetric efficiency as the human brain in one-third of a cubic foot (about the size of a shoebox) and using less than ten watts of power

Silicon Brain

Article:  "Chip Stack Aims for Brain-like Connectivity"


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